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type ordering code package tle 4271-2 q67000-a9446 p-to220-7-11 tle 4271-2 s q67000-a9448 p-to220-7-12 tle 4271-2 g q67006-a9447 p-to263-7-1 5-v low drop fixed voltage regulator tle 4271-2 ^ p-to220-7-11 p-to220-7-12 p-to263-7-1 data sheet 1 rev. 2.6, 2004-01-01 features ? output voltage tolerance 2% low-drop voltage integrated overtemperature protection reverse polarity protection input voltage up to 42 v overvoltage protection up to 65 v ( 400 ms) short-circuit proof suitable for use in automotive electronics wide temperature range adjustable reset and watchdog time functional description the tle 4271-2 is functional and electrical identical to tle 4271. the device is a 5-v low drop fixed voltage regulator. the maximum input voltage is 42 v (65 v, 400 ms). up to an input voltage of 26 v and for an output current up to 550 ma it regulates the output voltage within a 2% accuracy. the short circuit protection limits the output current of more than 650 ma. the ic can be switched off via the inhibit input. an integrated watchdog monitors the connected controller. the device incorporates overvoltage protection and temperature protection that disables the circuit at overtemperature.
data sheet 2 rev. 2.6, 2004-01-01 tle 4271-2 figure 1 pin configuration (top view) table 1 pin definitions and functions pin symbol function 1i input; block to ground directly on the ic with ceramic capacitor. 2inh inhibit 3ro reset output; the open collector output is connected to the 5 v output via an integrated resistor of 30 k ? . 4gnd ground 5d reset delay; connect a capacitor to ground for delay time adjustment. 6wi watchdog input 7q 5-v output; block to ground with 22 f capacitor, esr < 3 ? . aep01939 gnd inh ro wi d q 17 gnd inh ro 1 wi aep02017 d q 7 aep01938 inh ro gnd 17 wi d q p-to220-7-11 p-to220-7-12 p-to263-7-1
tle 4271-2 data sheet 3 rev. 2.6, 2004-01-01 circuit description the control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of a series transistor via a buffer. saturation control as a function of the load current prevents any over-saturation of the power element. the reset output ro is in high-state if the voltage on the delay capacitor c d is greater or equal v ud . the delay capacitor c d is charged with the current i d for output voltages greater than the reset threshold v rt . if the output voltage gets lower than v rt ( ? reset condition ? ) a fast discharge of the delay capacitor c d sets in and as soon as v d gets lower than v ld the reset output ro is set to low-level. the time for the delay capacitor charge from v ud to v ld is the reset delay time t d . when the voltage on the delay capacitor has reached v ud and reset was set to high, the watchdog circuit is enabled and discharges c d with the constant current i dwd . if there is no rising edge observed at the watchdog input, c d will be discharge down to v ldw , then reset output ro will be set to low and c d will be charged again with the current i dwc until v d reaches v ud and reset will be set high again. if the watchdog pulse (rising edge at watchdog input wi) occurs during the discharge period c d is charged again and the reset output stays high. after v d has reached v ud , the periodical behavior starts again. internal protection circuits protect the ic against: overload overvoltage overtemperature reverse polarity
data sheet 4 rev. 2.6, 2004-01-01 tle 4271-2 figure 2 block diagram temperature sensor saturation control and protection circuit + - reference bandgap adjustment reset generator watchdog 4 2 1 7 3 5 6 inh gnd aeb01940 control amplifier buffer q d ro wi
tle 4271-2 data sheet 5 rev. 2.6, 2004-01-01 table 2 absolute maximum ratings t j = -40 to 150 c parameter symbol limit values unit notes min. max. input voltage voltage current v i v i i i -42 ? ? 42 65 ? v v ma ? t 400 ms internally limited inhibit voltage voltage current v inh v inh i inh -42 ? ? 42 65 ? v v ma ? t 400 ms internally limited reset output voltage current v ro i ro -0.3 ? 42 ? v ma ? internally limited reset delay voltage current v d i d -0.3 -5 7 5 v ma ? ? watchdog voltage current v w i w -0.3 -5 7 5 v ma ? ? output voltage current v q i q -1.0 -5 16 ? v ma ? internally limited ground current i gnd -0.5 ? a ? temperatures junction temperature storage temperature t j t stg ? -50 150 150 c c ? ?
data sheet 6 rev. 2.6, 2004-01-01 tle 4271-2 table 3 operating range parameter symbol limit values unit notes min. max. input voltage v i 640v ? junction temperature t j -40 150 c ? thermal resistance junction ambient r thja ? ? 65 70 k/w k/w ? p-to263-7-1 junction case r thjc z thjc ? ? 3 2 k/w k/w ? t < 1 ms
tle 4271-2 data sheet 7 rev. 2.6, 2004-01-01 table 4 characteristics v i = 13.5 v; -40 c t j 125 c; v inh > v u,inh (unless otherwise specified) parameter symbol limit values unit test condition min. typ. max. output voltage v q 4.90 5.00 5.10 v 5 ma i q 550 ma; 6 v v i 26 v output voltage v q 4.90 5.00 5.10 v 26 v v i 36 v; i q 300 ma output current limiting i qmax 650 800 ? ma v q = 0 v current consumption i q = i i i q ?? 6 a v inh = 0 v; i q = 0 ma current consumption i q = i i i q ? 800 ? a v inh = 5 v; i q = 0 ma current consumption i q = i i - i q i q ? 11.5ma i q = 5 ma current consumption i q = i i - i q i q ? 55 75 ma i q = 550 ma current consumption i q = i i - i q i q ? 70 90 ma i q = 550 ma; v i = 5 v drop voltage v dr ? 350 700 mv i q = 550 ma 1) load regulation ? v q ? 25 50 mv i q = 5 to 550 ma; v i = 6 v supply voltage regulation ? v q ? 12 25 mv v i = 6 to 26 v i q = 5 ma power supply ripple rejection psrr ? 54 ? db f r = 100 hz; v r = 0.5 vpp
data sheet 8 rev. 2.6, 2004-01-01 tle 4271-2 reset generator switching threshold v rt 4.5 4.65 4.8 v ? reset high voltage v roh 4.5 ?? v ? saturation voltage v ro,sat ? 60 ? mv r intern = 30 k ? ; 1.0 v v q 4.5 v saturation voltage v ro,sat ? 200 400 mv i r = 3 ma 2) ; v q = 4.4 v reset pull-up r 18 30 46 k ? internally connected to q lower reset timing threshold v ld 0.2 0.45 0.8 v v q < v rt charge current i d 81425 a v d = 1.0 v upper timing threshold v ud 1.4 1.8 2.3 v ? delay time t d 8 1318ms c d = 100 nf reset reaction time t rr ?? 3 s c d = 100 nf overvoltage protection turn-off voltage v i, ov 40 44 46 v ? inhibit turn-on voltage v u,inh 1.0 2.0 3.5 v v q = high (> 4.5 v) turn-off voltage v l,inh 0.8 1.3 3.3 v v q = low (< 0.8 v) inhibit current i inh 81225 a v inh = 5 v watchdog upper watchdog switching threshold v udw 1.4 1.8 2.3 v ? lower watchdog switching threshold v ldw 0.2 0.45 0.8 v ? discharge current i dwd 1.5 2.7 3.5 a v d = 1 v charge current i dwc 81425 a v d = 1 v watchdog period t wd,p 40 55 80 ms c d = 100 nf table 4 characteristics (cont ? d) v i = 13.5 v; -40 c t j 125 c; v inh > v u,inh (unless otherwise specified) parameter symbol limit values unit test condition min. typ. max.
tle 4271-2 data sheet 9 rev. 2.6, 2004-01-01 watchdog trigger time t wi,tr 30 45 66 ms c d = 100 nf see diagram watchdog pulse slew rate v wi 5 ?? v/ s from 20% to 80% v q 1) drop voltage = v i - v q (measured when the output voltage has dropped 100 mv from the nominal value obtained at 13.5 v input) 2) test condition not applicable during delay time for power-on reset. table 4 characteristics (cont ? d) v i = 13.5 v; -40 c t j 125 c; v inh > v u,inh (unless otherwise specified) parameter symbol limit values unit test condition min. typ. max.
data sheet 10 rev. 2.6, 2004-01-01 tle 4271-2 figure 3 test circuit figure 4 circuit 3 2 v v v inh c d d 5 d 4 wi gnd v 6 aes01941 ro v v q 470 nf 1000 f tle 4271-2 17 q 22 f ro 22 f to mc reset 3 4 5 100 nf aes01942 470 nf input tle 4271-2 1 7 5 v-output 6 2 e.g. kl 15 input watchdog signal from mc
tle 4271-2 data sheet 11 rev. 2.6, 2004-01-01 application description the ic regulates an input voltage in the range of 6 v < v i < 40 v to v qnom = 5.0 v. up to 26 v it produces a regulated output current of more than 550 ma. above 26 v the save- operating-area protection allows operation up to 36 v with a regulated output current of more than 300 ma. overvoltage protection limits operation at 42 v. the overvoltage protection hysteresis restores operation if the input voltage has dropped below 36 v. the ic can be switched off via the inhibit input, which causes the quiescent current to drop below 10 a. a reset signal is generated for an output voltage of v q < 4.5 v. the watchdog circuit monitors a connected controller. if there is no positive-going edge at the watchdog input within a fixed time, the reset output is set to low. the delay for power-on reset and the maximum permitted watchdog-pulse period can be set externally with a capacitor. design notes for external components an input capacitor c i is necessary for compensation of line influences. the resonant circuit consisting of lead inductance and input capacitance can be damped by a resistor of approx. 1 ? in series with c i . an output capacitor c q is necessary for the stability of the regulating circuit. stability is guaranteed at values of c q 22 f and an esr of <3 ? . reset circuitry if the output voltage decreases below 4.5 v, an external capacitor c d on pin d will be discharged by the reset generator. if the voltage on this capacitor drops below v drl , a reset signal is generated on pin ro, i.e. reset output is set low. if the output voltage rises above the reset threshold, c d will be charged with constant current. after the power-on- reset time the voltage on the capacitor reaches v du and the reset output will be set high again. the value of the power-on-reset time can be set within a wide range depending of the capacitance of c d . reset timing the power-on reset delay time is defined by the charging time of an external capacitor c d which can be calculated as follows: t d = c d ? v / i d (1) definitions: c d = delay capacitor t d = reset delay time i d = charge current, typical 14 a ? v = v ud , typical 1.8 v v ud = upper delay timing threshold at c d for reset delay time
data sheet 12 rev. 2.6, 2004-01-01 tle 4271-2 the reset reaction time t rr is the time it takes the voltage regulator to set the reset out low after the output voltage has dropped below the reset threshold. it is typically 1 s for delay capacitor of 47 nf. for other values for c d the reaction time can be estimated using the following equation: t rr 20 s/f c d (2) figure 5 time response aet01985 t d t rr rr t < power reset shutdown thermal voltage drop at input undervoltage at output secondary spike bounce load shutdown on v ro, sat ld v ud v v d, sat rt v l, inh v v u, inh inh v ro v v d q v v t t t t t = dt v d d d c
tle 4271-2 data sheet 13 rev. 2.6, 2004-01-01 watchdog timing figure 6 time response, watchdog behavior aes03078 wd, p t t wd, l d v v q v v r w v w , tr t udw v = - v ldw () udw v - v ldw () dwd dwc t = wd, l c d w , tr t wd , p t udw v = - v ldw ()( ) dwc + dwd . dwc dwd c d c ; d ; udw v v ldw
data sheet 14 rev. 2.6, 2004-01-01 tle 4271-2 typical performance characteristics output voltage v q versus temperature t j output voltage v q versus input voltage v i ( v inh = v i ) aed01928 -40 04080 120 ?c 160 4.6 j t q v v i = 13.5 v 4.7 4.8 4.9 5.0 5.1 v 5.2 r 6 4 2 0 4 0 2 8 12 10 q v v 10 v 68 v aed01929 = 25 l ?
data sheet 15 rev. 2.6, 2004-01-01 tle 4271-2 output current limit i q versus temperature t j current consumption i q versus output current i q output current i q versus input voltage v i current consumption i q versus output current i q aed01930 -40 04080 120 ? c 160 0 j t 200 400 600 800 1000 ma 1200 q max i 0 0 aed03076 q ma = 13.5 v ma v 20 40 60 80 120 q 1 2 3 4 5 6 aed01931 0 10 20 30 40 v50 0 0.4 0.8 1.2 a 1.0 0.6 0.2 i v i q = 125 ? c t j 25 ? c 0 0 aed03077 q ma = 13.5 v ma v 100 200 300 400 600 q 10 20 30 40 50 60 70 80
data sheet 16 rev. 2.6, 2004-01-01 tle 4271-2 current consumption i q versus input voltage v i inhibit current i inh versus inhibit voltage v inh drop voltage v dr versus output current i q output voltage v q versus inhibit voltage v inh aed01934 0 10 20 30 40 v50 0 40 80 120 ma 100 60 20 i v i q 20 ? l r = 10 ? 50 ? r l = 0 0 1 6 3 2 inh aed01944 4 v 2 4 6 8 10 12 v = 13.5 v = 25 c j t inh, high inh, on inh, off 5 inh v a 400 200 300 100 200 0 400 0 800 600 700 500 dr v mv ma 600 1000 q aed02755 t = 125 c j t = 25 c j 3 3 2 1 0 0 1 2 6 5 4 v 5 v 4 6 v inh = 25 c = 13.5 v j v t aed01945 q v
data sheet 17 rev. 2.6, 2004-01-01 tle 4271-2 inhibit current consumptions i inh versus temperature t j switching voltage v ud and v ldw versus temperature t j inhibit voltages v inh versus temperature t j -40 0 0 120 80 40 t j a 14 aed01946 160 inh 2 4 6 8 10 12 inh , high inh , on inh , off ud 40 -40 0 0 v v v udw , v v 160 c 80 120 t j aed01948 = 13.5 v 1.2 0.8 0.4 1.6 2.4 2.0 ldw v 3 2 1 40 -40 0 0 4 v 6 5 inh 160 c 80 120 aed01947 j t v v inh , on inh , off v
data sheet 18 rev. 2.6, 2004-01-01 tle 4271-2 charge current i d , i dwc and discharge current i dwd versus temperature t j watchdog pulse time t w versus temperature t j aed01949 -40 0 i v = 13.5 v 2 4 6 8 10 12 14 16 a 04080 120 160 ? c i t j = 1 v d v d i , i dwc i dwd 80 40 -40 0 10 30 20 40 0 50 60 70 80 160 120 c t j = 13.5 v aed01950 c d v = 100 nf ms w t
tle 4271-2 data sheet 19 rev. 2.6, 2004-01-01 package outlines figure 7 p-to220-7-11 (plastic transistor single outline) typical 0.1 1.27 4.4 9.25 0.2 0.05 1) all metal surfaces tin plated, except area of cut. 2.4 0.5 0.1 0.3 8.6 10.2 0.3 0.4 3.9 0.4 8.4 3.7 0.3 a a 0.25 m 9.8 0.15 2.8 1) 15.65 0.3 13.4 0...0.15 1.27 0.6 0.1 c 0.2 17 0.3 8.5 1) 9.9 0.2 7x -0.15 3.7 10 0.2 6x c 1.6 0.3 gpt09083 you can find all of our packages, sorts of packing and others in our infineon internet page products : http://www.infineon.com/products . dimensions in mm smd = surface mounted device
data sheet 20 rev. 2.6, 2004-01-01 tle 4271-2 figure 8 p-to220-7-12 (plastic transistor single outline) gpt09084 a b a 0.25 m typical 9.8 0.15 2.8 1) 15.65 0.3 13.4 0...0.15 1.27 0.6 0.1 0.1 1.27 4.4 b 9.25 0.2 0.05 1) all metal surfaces tin plated, except area of cut. c 0.2 17 0.3 8.5 1) 10 0.2 3.7 -0.15 c 2.4 0.5 0.1 13 0.5 0.5 11 7x you can find all of our packages, sorts of packing and others in our infineon internet page products : http://www.infineon.com/products . dimensions in mm smd = surface mounted device
tle 4271-2 data sheet 21 rev. 2.6, 2004-01-01 figure 9 p-to263-7-1 (plastic transistor single outline) a 8 ? max. b a 0.25 m 0.1 typical 9.8 0.15 0.2 10 8.5 1) 8 1) (15) 0.2 9.25 0.3 1 0...0.15 7x0.6 0.1 0.1 1.27 4.4 b 0.5 0.1 0.3 2.7 4.7 0.5 0.05 1) 0.1 all metal surfaces tin plated, except area of cut. 2.4 6x1.27 gpt09114 you can find all of our packages, sorts of packing and others in our infineon internet page products : http://www.infineon.com/products . dimensions in mm smd = surface mounted device
edition 2004-01-01 published by infineon technologies ag, st.-martin-strasse 53, 81669 mnchen, germany ? infineon technologies ag 2004. all rights reserved. attention please! the information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. information for further information on technology, delivery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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